1. Field of the Invention
The present invention relates to a method of cleaning a processing chamber used for integrated circuit fabrication processes.
2. Description of the Background Art
Integrated circuits have evolved into complex devices that can include millions of components (e. g., transistors, capacitors and resistors) on a single chip. The evolution of chip designs continually requires faster circuitry and greater circuit density. The demands for greater circuit density necessitate a reduction in the dimensions of the integrated circuit components.
As the dimensions of the integrated circuit components are reduced (e. g., sub-micron dimensions), the materials used to fabricate such components contribute to their electrical performance. For example, low dielectric constant (e. g., dielectric constant less than about 4.0) silicon carbide and/or organosilicate insulating layers may be used to electrically isolate metal interconnects (e. g., copper (Cu) and aluminum (Al)) on integrated circuits. The low dielectric constant silicon carbide and/or organosilicate insulating layers are needed to minimize capacitive coupling between adjacent metal interconnects. Capacitive coupling between adjacent metal interconnects may cause cross talk and/or resistance-capacitance (RC) delay which degrades the overall performance of the integrated circuit.
The low dielectric constant silicon carbide and/or organosilicate layers are typically formed using one or more process chambers of a semiconductor wafer processing system. However, during such layer formation, silicon carbide and/or organosilicate material may accumulate on interior surfaces of the process chambers used therefor. For example, using chemical vapor deposition (CVD) processes, silicon carbide and/or organosilicate material that is formed on a substrate may also be deposited on interior surfaces of process chambers, during a deposition step. In addition, for etch processes, silicon carbide and/or organosilicate material that is etched from a substrate may similarly be deposited on interior surfaces of the process chambers during an etch step.
Typically after several processing cycles, silicon carbide and/or organosilicate material that has accumulated on the interior surfaces of the process chamber must be removed to maintain continued process integrity. One technique proposed to clean material from interior surfaces of a process chamber utilizes a gas mixture of oxygen (O2) and nitrogen trifluoride (NF3). However, such a cleaning chemistry provides a slow etch rate (e. g., etch rates less than about 5000 xc3x85/min) for removing silicon carbides and/or organosilicates from interior surfaces of process chambers.
Therefore, a need exists in the art for a cleaning chemistry suitable for removing silicon carbide and/or organosilicate deposits from interior surfaces of process chambers.
A method for cleaning a processing chamber of a semiconductor wafer processing system is provided. In one aspect, a processing chamber is cleaned by treating it using a hydrogen/fluorine-based plasma. The hydrogen/fluorine-based plasma reacts with silicon carbide and/or organosilicate layers formed on interior surfaces of the process chamber so as to remove such layers therefrom.
In another aspect, a processing chamber is cleaned by treating it using a hydrogen-based plasma followed by a fluorine-based plasma. Each of the plasmas reacts with silicon carbide and/or organosilicate layers formed on interior surfaces of the process chamber so as to remove such layers therefrom.
In yet another aspect, a process chamber is cleaned by treating it using a fluorine-based plasma followed by a hydrogen-based plasma. Each of the plasmas reacts with silicon carbide and/or organosilicate layers formed on interior surfaces of the process chamber so as to remove such layers therefrom.